Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking
Aleksandr Zaks
Zijiang Yang
Ilya Shlyakhter
Srihari Cadambi
Malay K. Ganai
Aarti Gupta
Pranav Ashar
IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (2008), pp. 1513-1517
Abstract
Meet the teams driving innovation
Our teams advance the state of the art through research, systems engineering, and collaboration across Google.
See our teams