Abstract
System coherency verification is vital for ensuring data consistency in complex memory hierarchies, but late integration often delays bug discovery. This paper presents a "left-shift" approach to accelerate coherency verification. We detail three key aspects: early verification via a stitched DUT for initial testing; automated stimulus generation using third-party tools like Cadence Perspec to cover complex system-level scenarios; and automated checker generation, complemented by an in-house tool (DICE). This methodology significantly reduces test/checker development time, enables faster test creation for corner cases, and results in better system-level coherency coverage, finding critical bugs earlier in the design cycle.